Abstract
Brain-inspired computing takes inspiration from the brain to create energy-efficient hardware systems for information processing, capable of performing highly sophisticated tasks. Systems built with emerging electronics, such as memristive devices, can achieve gains in speed and energy by mimicking the distributed topology of the brain. In this work, a brain-inspired hardware architecture for evolutionary algorithms is proposed based on memristive arrays, which can realize sparse and approximate computing as a result of the parallel analog computing characteristic of the memristive arrays. On this basis, an efficient evolvable brain-inspired hardware system is implemented. We experimentally show that the approach can offer at least a four orders of magnitude speed improvement. We also use experimentally grounded simulations to explore fault tolerance and different parameter settings in the implemented hardware system. The experimental results show that the evolvable hardware system, implemented based on the proposed hardware architecture, can continuously evolve toward a better system even if there are failures or parameter changes in the memristive arrays, demonstrating that the proposed hardware architecture has good adaptability and fault tolerance. © 2023 Copyright held by the owner/author(s).
Original language | English |
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Article number | 82 |
Journal | ACM Transactions on Design Automation of Electronic Systems |
Volume | 28 |
Issue number | 5 |
Early online date | 23 May 2023 |
DOIs | |
Publication status | Published - 30 Sept 2023 |
Externally published | Yes |
Bibliographical note
This work was supported by the Young Scientists Fund of the National Natural Science Foundation of China (grant 62206121), the Postdoctoral Science Foundation of China (grant 2021M701578), the Research Institute of Trustworthy Autonomous Systems (RITAS), the Guangdong Provincial Key Laboratory (grant 2020B121201001), the Program for Guangdong Introducing Innovative and Enterpreneurial Teams (grant 2017ZT07X386), and the Shenzhen Science and Technology Program (grant KQTD2016112514355531).Keywords
- brain-inspired architecture
- circuit implementation
- evolutionary algorithms
- Memristor
- parallel analog computing