Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications

Yucheng JIANG; Haifeng GUO; Junhao ZHENG; Jingsheng WANG; Songping MAI

doi:10.1109/ICTA56932.2022.9963036

Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications

Yucheng JIANG
, Haifeng GUO
, Junhao ZHENG
, Jingsheng WANG
, Songping MAI

Research output: Book Chapters | Papers in Conference Proceedings › Conference paper (refereed) › Research › peer-review

Abstract

a hardware-efficient hybrid greedy CU (coding unit) partition algorithm for AVS3 intra prediction, which has advantages over the traditional regression algorithm on both scheduling complexity and resource consumption, is presented. Compared with the NVidia hardware acceleration of HEVC, the proposed algorithm achieves 21% performance improvement on AI (all-intra) configuration for UHD 4K video encoding.

Original language	English
Title of host publication	Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	194-195
Number of pages	2
ISBN (Electronic)	9781665492690
DOIs	https://doi.org/10.1109/ICTA56932.2022.9963036
Publication status	Published - 2022
Externally published	Yes
Event	2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022 - Xi'an, China Duration: 28 Oct 2022 → 30 Oct 2022

Conference

Conference	2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022
Country/Territory	China
City	Xi'an
Period	28/10/22 → 30/10/22

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

Funding

This work was supported by the Science, Technology and Innovation Commission of Shenzhen Municipality (WDZC20200820160650001) and Guangdong Province Science and Technology Program (2019B010143003).

Keywords

hardware design
intra prediction
real-time application
video coding

Access to Document

10.1109/ICTA56932.2022.9963036

Cite this

JIANG, Y., GUO, H., ZHENG, J., WANG, J., & MAI, S. (2022). Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications. In Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022 (pp. 194-195). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICTA56932.2022.9963036

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title = "Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications",

abstract = "a hardware-efficient hybrid greedy CU (coding unit) partition algorithm for AVS3 intra prediction, which has advantages over the traditional regression algorithm on both scheduling complexity and resource consumption, is presented. Compared with the NVidia hardware acceleration of HEVC, the proposed algorithm achieves 21\% performance improvement on AI (all-intra) configuration for UHD 4K video encoding.",

keywords = "hardware design, intra prediction, real-time application, video coding",

author = "Yucheng JIANG and Haifeng GUO and Junhao ZHENG and Jingsheng WANG and Songping MAI",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022 ; Conference date: 28-10-2022 Through 30-10-2022",

year = "2022",

doi = "10.1109/ICTA56932.2022.9963036",

language = "English",

pages = "194--195",

booktitle = "Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022",

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JIANG, Y, GUO, H, ZHENG, J, WANG, J & MAI, S 2022, Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications. in Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022. Institute of Electrical and Electronics Engineers Inc., pp. 194-195, 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022, Xi'an, China, 28/10/22. https://doi.org/10.1109/ICTA56932.2022.9963036

Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications. / JIANG, Yucheng; GUO, Haifeng; ZHENG, Junhao et al.
Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 194-195.

Research output: Book Chapters | Papers in Conference Proceedings › Conference paper (refereed) › Research › peer-review

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AU - GUO, Haifeng

AU - ZHENG, Junhao

AU - WANG, Jingsheng

AU - MAI, Songping

PY - 2022

Y1 - 2022

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AB - a hardware-efficient hybrid greedy CU (coding unit) partition algorithm for AVS3 intra prediction, which has advantages over the traditional regression algorithm on both scheduling complexity and resource consumption, is presented. Compared with the NVidia hardware acceleration of HEVC, the proposed algorithm achieves 21% performance improvement on AI (all-intra) configuration for UHD 4K video encoding.

KW - hardware design

KW - intra prediction

KW - real-time application

KW - video coding

UR - https://www.scopus.com/pages/publications/85143977768

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DO - 10.1109/ICTA56932.2022.9963036

M3 - Conference paper (refereed)

AN - SCOPUS:85143977768

SP - 194

EP - 195

BT - Proceedings of 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2022

Y2 - 28 October 2022 through 30 October 2022

ER -

Efficient AVS3 Intra Prediction Hardware Design for Real-time Applications

Abstract

Conference

Bibliographical note

Funding

Keywords

Access to Document

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