Abstract
A novel carrier-stored trench bipolar transistor (CSTBT) with heavily doped carrier-stored layer (CSL) is proposed and investigated by TCAD tools. The voltage of CSL is shielded by a buried p-type layer (P-bury) whose potential is clamped by a p-type Schottky Barrier Diode (pSBD) in series-connection with a PN diode. Hence, the CSL can be heavily doped, and the trade-off between on-state voltage drop (Von) and turn-off loss (Eoff) is substantially improved. Compared with that of a conventional CSTBT with floating P-base (FP-CSTBT), the Eoff of the proposed CSTBT is reduced by 27.9% at Von = 1.1 V. Owing to the shielding effect of the P-bury layer, the saturation current density of the proposed CSTBT is reduced by 52% compared with that of the FP-CSTBT. Consequently, significantly enlarged short-circuit safe operation area is obtained, and the short-circuit withstand time (tsc) is increased to 12.8 s at ultra-low Von (~ 1.1 V).
| Original language | English |
|---|---|
| Pages (from-to) | 1225-1232 |
| Number of pages | 8 |
| Journal | Journal of Power Electronics |
| Volume | 21 |
| Issue number | 8 |
| Early online date | 2 Jun 2021 |
| DOIs | |
| Publication status | Published - Aug 2021 |
| Externally published | Yes |
Funding
This work was supported in part by the National Natural Science Foundation of China under Grant 61804021, in part by the Fundamental Research Funds for the Central Universities under Grant ZYGX2019J020, and in part by the scholarship from China Scholarship Council under the Grant 201908515126.
Keywords
- Carrier stored
- Injection enhanced
- Short-circuit capability
- Turn-off loss