TY - GEN
T1 - Self-aware Hierarchical Neuromorphic Architecture
AU - WANG, Zilu
AU - YAO, Xin
N1 - This work was supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 62206121), the Shenzhen Higher Education Stable Support Program General Project (Grant No. GXWD20231130200138001), and the Program for Guangdong Provincial Key Laboratory (Grant No. 2020B121201001).
PY - 2024
Y1 - 2024
N2 - We introduce a neuromorphic architecture devised by mapping biologically inspired concepts onto a computational framework for self-awareness, offering a new way to embed inherent autonomy directly within hardware. Leveraging this architecture as a blueprint, we have designed a memristor-based circuit capable of autonomous decision-making, employing a bio-inspired hierarchical design approach. The core of this approach involves translating the functions of biological neurons and synapses into memristor-based circuits, which act as efficient computational units at the bottom layer of the circuit. It ensures that the developed circuit strikes a balance between functional flexibility and computational efficiency. Experimental results show that our implemented circuit provides efficient computational capabilities for effective decision-making, thanks to its memristor-based bio-inspired hierarchical implementation. Furthermore, its neuromorphic architecture inspired by self-awareness facilitates the easy simulation of reliable autonomous behaviors. Through the analysis of hardware overhead and power consumption, our circuit proves to be hardware-friendly. Our work represents progress towards developing memristor-based neuromorphic circuits characterized by high computational performance and autonomous functionality.
AB - We introduce a neuromorphic architecture devised by mapping biologically inspired concepts onto a computational framework for self-awareness, offering a new way to embed inherent autonomy directly within hardware. Leveraging this architecture as a blueprint, we have designed a memristor-based circuit capable of autonomous decision-making, employing a bio-inspired hierarchical design approach. The core of this approach involves translating the functions of biological neurons and synapses into memristor-based circuits, which act as efficient computational units at the bottom layer of the circuit. It ensures that the developed circuit strikes a balance between functional flexibility and computational efficiency. Experimental results show that our implemented circuit provides efficient computational capabilities for effective decision-making, thanks to its memristor-based bio-inspired hierarchical implementation. Furthermore, its neuromorphic architecture inspired by self-awareness facilitates the easy simulation of reliable autonomous behaviors. Through the analysis of hardware overhead and power consumption, our circuit proves to be hardware-friendly. Our work represents progress towards developing memristor-based neuromorphic circuits characterized by high computational performance and autonomous functionality.
KW - Self-awareness
KW - autonomous decision-making
KW - circuit implementation
KW - memristor
KW - neuromorphic architecture
UR - http://www.scopus.com/inward/record.url?scp=85204961113&partnerID=8YFLogxK
U2 - 10.1109/IJCNN60899.2024.10651207
DO - 10.1109/IJCNN60899.2024.10651207
M3 - Conference paper (refereed)
SN - 9798350359329
T3 - Proceedings of the International Joint Conference on Neural Networks
SP - 1
EP - 10
BT - 2024 International Joint Conference on Neural Networks, IJCNN 2024 Conference Proceedings
PB - IEEE
T2 - 2024 International Joint Conference on Neural Networks (IJCNN)
Y2 - 30 June 2024 through 5 July 2024
ER -